Download Analysis and Design of Resilient VLSI Circuits: Mitigating by Rajesh Garg PDF

By Rajesh Garg

This publication is stimulated by means of the demanding situations confronted in designing trustworthy integratedsystems utilizing smooth VLSI strategies. The trustworthy operation of built-in Circuits (ICs) has turn into more and more tricky to accomplish within the deep sub-micron (DSM) period. With consistently reducing gadget characteristic sizes, mixed with decrease offer voltages and better working frequencies, the noise immunity of VLSI circuits is lowering alarmingly. therefore, VLSI circuits have gotten extra prone to noise results similar to crosstalk, strength provide adaptations and radiation-induced gentle errors.

This booklet describes the layout of resilient VLSI circuits. It provides algorithms to research the unsafe results of radiation particle moves and processing adaptations at the electric habit of VLSI circuits, in addition to circuit layout ideas to mitigate the effect of those problems.

  • Describes the cutting-edge within the components of radiation tolerant circuit layout and strategy edition tolerant circuit design;
  • Presents analytical methods to check successfully the severity of electric results of radiation/process adaptations, in addition to suggestions to lessen the consequences as a result of those problems;
  • Distills content material orientated towards nuclear engineers into modern algorithms and strategies that may be understood simply and utilized via VLSI designers.

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Additional resources for Analysis and Design of Resilient VLSI Circuits: Mitigating Soft Errors and Process Variations

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2, pp. 24–36, 1999. 25. H. Chang and S. S. Sapatnekar, “Statistical timing analysis under spatial correlations,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 9, pp. 1467–1482, Sept. 2005. 26. L. He, A. B. Kahng, K. H. Tam, and J. Xiong, “Simultaneous buffer insertion and wire sizing considering systematic CMP variation and random Leff variation,” Proc. of the Intl. Conf. on Computer-Aided Design, vol. 26, no. 5, pp. 845–857, May 2007. 27. K. Cao, S.

The effect of the ion track establishment constant ( “ ) of the radiation particle induced current pulse is accounted for. The voltage glitch estimated by this analytical model can be propagated to the primary outputs of a circuit using existing voltage glitch propagation tools. The properties of the voltage glitch (such as its magnitude, glitch shape and width) at the primary outputs can be used to evaluate the SEE robustness of the circuit. On the basis of the result of this analysis, circuit hardening approaches can be implemented to achieve the level of radiation tolerance required.

275–284. 16. A. Johnston, “Scaling and technology issues for soft error rate,” in Proc. of the Annual Research Conf. on Reliability, Oct. 2000, pp. 1–8. 17. L. D. Edmonds, “A simple estimate of funneling-assisted charge collection,” IEEE Transactions on Nuclear Science, vol. 38, no. 2, pp. 828–833, Apr 1991. 18. P. E. Dodd, F. W. Sexton, and P. S. Winokur, “Three-dimensional simulation of charge collection and multiple-bit upset in Si devices,” IEEE Transactions on Nuclear Science, vol. 41, pp.

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